Subrata Banik 1a274f406c soc/intel/cannonlake: Add SoC API to make use SMM common code ... Add SoC API to detect any illegal access to write into the BIOS located in the FWH. Change-Id: If526cbae9afee47fa272bdf74e04416aff100e88 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22870 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2017-12-22 01:44:02 +00:00
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acpi
arch
commonlib	commonlib/region: expose subregion helper function	2017-12-15 23:35:05 +00:00
console
cpu	cpu/x86: set permanent SMM handler stack to 1KiB	2017-12-20 16:14:13 +00:00
device	device/dram/ddr2.c: Store the checksum in the decoded SPD struct	2017-12-20 16:53:30 +00:00
drivers	drvs/lenovo/hybrid_graphics/romstage: Fix dGPU activation	2017-12-20 16:52:06 +00:00
ec	ec/hp/kbc1126/acpi/battery.asl: Make \ISTR serialized	2017-12-19 23:27:56 +00:00
include	device/dram/ddr2.c: Store the checksum in the decoded SPD struct	2017-12-20 16:53:30 +00:00
lib
mainboard	google/fizz: Enable ec sw sync gbb by default	2017-12-21 23:49:47 +00:00
northbridge	intel/gma: fix RPNFREQ_VAL bitmask	2017-12-20 13:17:07 +00:00
security	security/vboot: Remove unused include of vboot_nvstorage.h	2017-12-07 01:20:51 +00:00
soc	soc/intel/cannonlake: Add SoC API to make use SMM common code	2017-12-22 01:44:02 +00:00
southbridge	intel/bd82x6x: Use generated ACPI PIRQ	2017-12-20 16:48:23 +00:00
superio
vendorcode	vc/amd/pi/0067F00: add option to add AGESA binary PI as stage	2017-12-13 15:53:24 +00:00
Kconfig