Sumeet R Pawnikar 360684b41a soc/intel/common: add TCC activation functionality ... This enables to configure the Thermal Control Circuit (TCC) activation value to new value as tcc_offset in degree Celcius. It prevents any abrupt thermal shutdown while running heavy workload. This helps to take early thermal throttling action before CPU temperature reaches maximum operating temperature TjMax value. Also, cleanup local functions from previous intel soc specific code base like for apollolake, broadwell, skylake and cannonlake. BUG=None BRANCH=None TEST=Built for volteer platform and verified the MSR value. Change-Id: I37dd878902b080602d70c5c3c906820613ea14a5 Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41855 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>		2020-06-28 21:47:52 +00:00
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amd	soc/amd/picasso/soc_util: rework reduced I/O chip detection	2020-06-28 14:16:36 +00:00
cavium	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
intel	soc/intel/common: add TCC activation functionality	2020-06-28 21:47:52 +00:00
mediatek	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
nvidia	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
qualcomm	soc/qualcomm/sc7180/qupv3_config.c: Add missing includes	2020-06-22 11:49:34 +00:00
rockchip	soc/rockchip: Use (Q) instead of @	2020-06-26 21:13:33 +00:00
samsung	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
sifive	treewide: Add Kconfig variable MEMLAYOUT_LD_FILE	2020-06-13 06:49:23 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00