coreboot/src
Wenbin Mei 1985894e74 soc/mediatek/mt8192: ufs: Disable reference clock
UFS reference clock (refclk) is enabled by default, which will cause
the UFSHCI to hold the SPM signal and lead to suspend failure. Since
UFS kernel driver is not built-in, disable refclk in coreboot stage.

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Change-Id: If11c1b756ad1a0b85f1005f56a6cb4648c687cf0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46408
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2020-12-16 06:27:12 +00:00
..
acpi cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
arch arch/x86: Combine bootblock linker scripts 2020-12-14 08:24:25 +00:00
commonlib coreboot tables: Add SPI flash memory map windows to coreboot tables 2020-12-08 22:56:09 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu arch/x86: Combine bootblock linker scripts 2020-12-14 08:24:25 +00:00
device drivers: Replace multiple fill_lb_framebuffer with single instance 2020-12-14 08:21:22 +00:00
drivers drivers: Replace multiple fill_lb_framebuffer with single instance 2020-12-14 08:21:22 +00:00
ec src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
include src/lib: Add Kconfig option for SPD cache in FMAP 2020-12-14 08:23:41 +00:00
lib src/lib: Add Kconfig option for SPD cache in FMAP 2020-12-14 08:23:41 +00:00
mainboard mb/purism/librem_mini: Adjust PL1/2 levels 2020-12-15 01:57:38 +00:00
northbridge nb/intel/ironlake: Add comment about MCH scan chains 2020-12-14 08:24:12 +00:00
security cbfs: Add verification for RO CBFS metadata hash 2020-12-03 00:11:08 +00:00
soc soc/mediatek/mt8192: ufs: Disable reference clock 2020-12-16 06:27:12 +00:00
southbridge sb/intel/common/smbus_ops.c: Clean up read resources 2020-12-14 21:03:28 +00:00
superio src: Remove redundant use of ACPI offset(0) 2020-12-03 00:05:52 +00:00
vendorcode vc/intel/fsp/fsp2_0/cooperlake_sp: Update WW47 FSP Memory map HOB 2020-12-07 10:30:09 +00:00
Kconfig Kconfig: Show console debug options if loglevel override is set 2020-12-11 15:58:24 +00:00