coreboot/southbridge
Ronald G. Minnich 863bcbff3b Two remaining issues:
/home/rminnich/coreboot-v3/build/coreboot.initram_partiallylinked.o: section .data.rel.ro.local: dual_channel_slew_group_lookup.3242 single_channel_slew_group_lookup.3243

and
/home/rminnich/coreboot-v3/southbridge/intel/i82801gx/smbus.c:34: error: conflicting types for ‘smbus_read_byte’
include/device/smbus.h:56: error: previous declaration of ‘smbus_read_byte’ was here

we are working these. The second is much harder than it seems. 
It concerns whether we put i2c devices (i.e. DRAM spd SEEPROMS) in the dts.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://coreboot.org/repository/coreboot-v3@1026 f3766cd6-281f-0410-b1cd-43a5c92072e9
2008-11-14 17:14:16 +00:00
..
amd cs5536: Support NAND flash on other locations than CS0 2008-11-06 17:52:52 +00:00
intel Two remaining issues: 2008-11-14 17:14:16 +00:00
nvidia/mcp55 Trivial fixes of printk \r\n and white space. 2008-10-28 17:29:07 +00:00
via/vt8237 via vt8237, cn700 and jetway j7f2. 2008-10-31 18:13:20 +00:00