For example: in C51/MCP55 or C51/MCP51 Will allow 1. C51 at 0x10 to 0x14, and MCP at 0 to 4 2. C51 at 1 to 4, and MCP at 7 to 0x0a The reason is c51/mcp51/mcp55 reported unitid is 0x0f (far beyond it needed), and will prevent us from putting them on bus 0. Typical values for c51/mcp55 or c51/mcp51: HT_CHAIN_UNITID_BASE = 0x10 # for C51 HT_CHAIN_END_UNITID_BASE = 0 # for mcp If only have mcp with c51, HT_CHAIN_UNITID_BASE = 0 # for MCP #HT_CHAIN_END_UNITID_BASE = 0 # default value 0x20 Signed-off-by: Yinghai Lu <yinghai.lu@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 |
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|---|---|---|
| .. | ||
| emulator | ||
| agp_device.c | ||
| cardbus_device.c | ||
| Config.lb | ||
| device.c | ||
| device_util.c | ||
| hypertransport.c | ||
| pci_device.c | ||
| pci_ops.c | ||
| pci_rom.c | ||
| pciexp_device.c | ||
| pcix_device.c | ||
| pnp_device.c | ||
| root_device.c | ||
| smbus_ops.c | ||