Keith Short 1835bf0fd4 post_code: add post code for critical CBFS failures ... Add a new post code POST_INVALID_CBFS, used when coreboot fails to locate or validate a resource that is stored in CBFS. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms Change-Id: If1c8b92889040f9acd6250f847db02626809a987 Signed-off-by: Keith Short <keithshort@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32771 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>		2019-05-22 16:52:48 +00:00
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apollolake	soc/intel: Remove unused pointer argument in mca_configure()	2019-05-21 16:20:56 +00:00
baytrail	soc/{baytrail/braswell/broadwell}: fix flashconsole on platform	2019-05-22 10:06:50 +00:00
braswell	soc/{baytrail/braswell/broadwell}: fix flashconsole on platform	2019-05-22 10:06:50 +00:00
broadwell	soc/{baytrail/braswell/broadwell}: fix flashconsole on platform	2019-05-22 10:06:50 +00:00
cannonlake	soc/intel/cannonlake: Dump ME f/w version and status information	2019-05-22 10:09:23 +00:00
common	soc/intel: Remove unused pointer argument in mca_configure()	2019-05-21 16:20:56 +00:00
denverton_ns	soc/intel: Remove unused pointer argument in mca_configure()	2019-05-21 16:20:56 +00:00
fsp_baytrail	soc/fsp_baytrail: fix flashconsole on platform	2019-05-22 10:06:55 +00:00
fsp_broadwell_de	soc/{amd,intel}/chip: Use local include for chip.h	2019-04-26 16:49:13 +00:00
icelake	soc/intel: Remove unused pointer argument in mca_configure()	2019-05-21 16:20:56 +00:00
quark	post_code: add post code for critical CBFS failures	2019-05-22 16:52:48 +00:00
skylake	soc/intel/fsp1.1: Implement postcar stage	2019-05-21 17:37:32 +00:00
Kconfig	src/cpu: Remove dead sourced lines	2018-11-15 10:25:20 +00:00