36e6c6f8d2
This change introduces a new top-level interface for interacting with a bitmask providing firmware configuration information. This is motivated by Chromebook mainboards that need to support multiple different configurations at runtime with the same BIOS. In these devices the Embedded Controller provides a bitmask that can be broken down into different fields and each field can then be broken down into different options. The firmware configuration value could also be stored in CBFS and this interface will look in CBFS first to allow the Embedded Controller value to be overridden. The firmware configuration interface is intended to easily integrate into devicetree.cb and lead to less code duplication for new mainboards that make use of this feature. BUG=b:147462631 TEST=this provides a new interface that is tested in subsequent commits Change-Id: I1e889c235a81545e2ec0e3a34dfa750ac828a330 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> |
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| .. | ||
| _static | ||
| acpi | ||
| arch | ||
| community | ||
| contributing | ||
| doxygen | ||
| drivers | ||
| flash_tutorial | ||
| getting_started | ||
| gfx | ||
| ifdtool | ||
| Intel | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| releases | ||
| RFC | ||
| security | ||
| soc | ||
| superio | ||
| technotes | ||
| tutorial | ||
| vendorcode | ||
| AMD-S3.txt | ||
| beginverbatim.tex | ||
| cbfs.txt | ||
| codeflow.svg | ||
| coding_style.md | ||
| conf.py | ||
| COPYING | ||
| coreboot_logo.png | ||
| corebootBuildingGuide.tex | ||
| distributions.md | ||
| Doxyfile.coreboot | ||
| Doxyfile.coreboot_simple | ||
| endverbatim.tex | ||
| gcov.txt | ||
| hypertransport.svg | ||
| index.md | ||
| mainboard_io_trap_handler_sample.c | ||
| Makefile | ||
| Makefile.sphinx | ||
| payloads.md | ||
| POSTCODES | ||
| util.md | ||
