coreboot/src/southbridge/intel/common
Angel Pons 79b2a150c7 sb/intel/x/smbus.c: Factor out common code
Since common smbus.c gets built for romstage as well, create a new file
to hold this common code. Account for ICH7 not having a memory BAR, too.

Change-Id: I4ab46750c6fb7f71cbd55848e79ecc3e44cbbd04
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48364
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-11 15:12:47 +00:00
..
acpi sb/intel/common/acpi/pcie.asl: Generalise file comment 2020-11-04 22:07:50 +00:00
firmware sb/intel/common: Modify CONFIG_LOCK_MANAGEMENT_ENGINE behavior 2020-12-07 14:06:28 +00:00
acpi_pirq_gen.c
acpi_pirq_gen.h
early_smbus.c
early_smbus.h
early_spi.h
finalize.c src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
finalize.h
gpio.c
gpio.h
Kconfig
madt.c
Makefile.inc sb/intel/x/smbus.c: Factor out common code 2020-12-11 15:12:47 +00:00
pciehp.c
pciehp.h
pmbase.c
pmbase.h
pmclib.c
pmclib.h
pmutil.c src/southbridge: Drop unneeded empty lines 2020-09-21 16:29:35 +00:00
pmutil.h src/southbridge: Drop unneeded empty lines 2020-09-21 16:29:35 +00:00
rcba.h
rcba_pirq.c
rcba_pirq.h
reset.c
rtc.c
rtc.h
smbus.c
smbus_ops.c sb/intel/x/smbus.c: Factor out common code 2020-12-11 15:12:47 +00:00
smbus_ops.h sb/intel/x/smbus.c: Factor out common code 2020-12-11 15:12:47 +00:00
smi.c src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
smihandler.c src/southbridge: Drop unneeded empty lines 2020-09-21 16:29:35 +00:00
spi.c src/southbridge: Drop unneeded empty lines 2020-09-21 16:29:35 +00:00
spi.h
tco.h
usb_debug.c
watchdog.c