coreboot/src
Felix Singer 172bcc835f soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabled
Change-Id: I522dc7287c85b304f6fc62c0c554e4d062c3c61c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43914
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner
2020-07-28 08:38:39 +00:00
..
acpi src/acpi/device.c: Add include <types.h> 2020-07-26 21:34:21 +00:00
arch arch/arm/armv7: Make null dcache_apply_all macro for userspace 2020-07-27 21:00:44 +00:00
commonlib src: Remove unused 'include <stdint.h> 2020-07-14 16:11:10 +00:00
console console: Update for vboot before bootblock 2020-06-15 22:07:12 +00:00
cpu cpu/intel/car/romstage.c: Remove unused <bootblock_common.h> 2020-07-26 21:38:22 +00:00
device src: Change BOOL CONFIG_ to CONFIG() in comments & strings 2020-07-26 21:20:30 +00:00
drivers Revert "src: Remove unused include <cpu/x86/smm.h>" 2020-07-28 06:05:20 +00:00
ec ec/lenovo/h8: Align macro values in one column 2020-07-26 21:40:00 +00:00
include include/rules.h: Add ENV_USER_SPACE definition 2020-07-27 21:00:23 +00:00
lib src: Remove unused 'include <types.h>' 2020-07-14 16:10:17 +00:00
mainboard volteer: Create eldrid variant 2020-07-28 03:00:27 +00:00
northbridge nb/amd/pi/00730F01/northbridge.c: Add include <types.h> 2020-07-26 21:36:06 +00:00
security src: Change BOOL CONFIG_ to CONFIG() in comments & strings 2020-07-26 21:20:30 +00:00
soc soc/intel/cannonlake: Configure SataPwrOptEnable only if SATA is enabled 2020-07-28 08:38:39 +00:00
southbridge sb/amd/agesa/hudson/hudson.h: Add include <types.h> 2020-07-26 21:36:15 +00:00
superio superio/common: Avoid NULL pointer dereference 2020-07-24 21:21:09 +00:00
vendorcode amd/picasso: rework USB2 PHY tune parameter handling 2020-07-26 17:08:00 +00:00
Kconfig arch/x86: Remove RELOCATABLE_RAMSTAGE 2020-07-06 06:17:47 +00:00