Tristan Shieh 17180af69a mediatek: Share PLL code among similar SOCs ... Refactor PLL code which will be reused among similar SOCs. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: I11f044fbef93d4f5f4388368c510958d2b0ae66c Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/27305 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2018-07-11 10:46:45 +00:00
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amd	src/soc: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:31:10 +00:00
broadcom	soc/broadcom/cygnus: Get rid of device_t	2018-06-04 09:21:04 +00:00
cavium	soc/cavium: Add secondary CPU support	2018-07-10 07:07:09 +00:00
imgtec	soc/imgtec/pistachio: Get rid of device_t	2018-06-04 09:18:19 +00:00
intel	src/soc: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:31:10 +00:00
lowrisc
marvell	soc/marvell/mvmap2315: Get rid of device_t	2018-06-04 09:18:05 +00:00
mediatek	mediatek: Share PLL code among similar SOCs	2018-07-11 10:46:45 +00:00
nvidia	src/soc: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:31:10 +00:00
qualcomm	src/soc: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:31:10 +00:00
rockchip	src/soc: Get rid of whitespace before tab	2018-06-04 09:20:52 +00:00
samsung	src/soc: Use "foo *bar" instead of "foo* bar"	2018-07-09 09:31:10 +00:00
sifive	src/sifive: Add the SiFive Freedom Unleashed 540 SoC	2018-04-26 11:52:37 +00:00
ucb