Furquan Shaikh a0729d9a56 soc/intel/apollolake: Change IOSF_BASE_ADDRESS to PCR_BASE_ADDRESS ... With recent change to use common block PCR (ccd8700c), IOSF_BASE_ADDRESS was renamed to PCR_BASE_ADDRESS. However, SD card change (99ce8a9b) was not rebased on top of it, so IOSF_BASE_ADDRESS slipped into the tree. Fix this by replacing all occurrences of IOSF_BASE_ADDRESS by PCR_BASE_ADDRESS. Change-Id: I40eb07be306035c940fc960896e0807d6c73bafa Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/19277 Tested-by: build bot (Jenkins) Reviewed-by: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri@intel.com> Reviewed-by: Martin Roth <martinroth@google.com>		2017-04-13 22:16:21 +02:00
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broadcom/cygnus	vboot: Move remaining features out of vendorcode/google/chromeos	2017-03-28 22:18:13 +02:00
dmp/vortex86ex	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
imgtec/pistachio	spi: Get rid of SPI_ATOMIC_SEQUENCING	2016-12-23 04:54:55 +01:00
intel	soc/intel/apollolake: Change IOSF_BASE_ADDRESS to PCR_BASE_ADDRESS	2017-04-13 22:16:21 +02:00
lowrisc/lowrisc	soc/lowrisc: Place CBMEM at top of autodetected RAM	2016-12-06 18:51:13 +01:00
marvell	vboot: Move remaining features out of vendorcode/google/chromeos	2017-03-28 22:18:13 +02:00
mediatek/mt8173	vboot: Move remaining features out of vendorcode/google/chromeos	2017-03-28 22:18:13 +02:00
nvidia	vboot: Move remaining features out of vendorcode/google/chromeos	2017-03-28 22:18:13 +02:00
qualcomm	Remove libverstage as separate library and source file class	2017-03-28 22:18:53 +02:00
rdc/r8610	rdc/r8610: Move to src/soc	2016-05-05 20:08:58 +02:00
rockchip	Remove libverstage as separate library and source file class	2017-03-28 22:18:53 +02:00
samsung	vboot: Select SoC-specific configuration for all Chrome OS boards	2017-03-28 22:12:54 +02:00
ucb/riscv	soc/ucb/riscv: Place CBMEM at top of autodetected RAM	2016-12-06 18:48:28 +01:00