coreboot/src/cpu/amd
Furquan Shaikh e8df7480d2 UPSTREAM: spi: Clean up SPI flash driver interface
RW flag was added to spi_slave structure to get around a requirement on
some AMD flash controllers that need to group together all spi volatile
operations (write/erase). This rw flag is not a property or attribute of
the SPI slave or controller. Thus, instead of saving it in spi_slave
structure, clean up the SPI flash driver interface. This allows
chipsets/mainboards (that require volatile operations to be grouped) to
indicate beginning and end of such grouped operations.

New user APIs are added to allow users to perform probe, read, write,
erase, volatile group begin and end operations. Callbacks defined in
spi_flash structure are expected to be used only by the SPI flash
driver. Any chipset that requires grouping of volatile operations can
select the newly added Kconfig option SPI_FLASH_HAS_VOLATILE_GROUP and
define callbacks for chipset_volatile_group_{begin,end}.

spi_claim_bus/spi_release_bus calls have been removed from the SPI flash
chip drivers which end up calling do_spi_flash_cmd since it already has
required calls for claiming and releasing SPI bus before performing a
read/write operation.

BUG=None
BRANCH=None
TEST=Compiles successfully.

Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17462
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Idfc052e82ec15b6c9fa874cee7a61bd06e923fbf
Reviewed-on: https://chromium-review.googlesource.com/415054
Commit-Ready: Aaron Durbin <adurbin@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-29 17:38:45 -08:00
..
agesa UPSTREAM: amd/cpu: Add details to chip names 2016-11-10 18:31:34 -08:00
car UPSTREAM: ACPI S3: Remove HIGH_MEMORY_SAVE where possible 2016-11-10 18:31:17 -08:00
dualcore UPSTREAM: src/cpu: Improve code formatting 2016-09-07 00:16:15 -07:00
family_10h-family_15h UPSTREAM: src/cpu: Remove unnecessary whitespace 2016-10-11 14:31:47 -07:00
geode_gx2 UPSTREAM: cpu/amd/geode_gx2: Remove unnecessary semicolon 2016-10-11 14:31:43 -07:00
geode_lx UPSTREAM: src/cpu: Remove unnecessary whitespace before "\n" 2016-09-02 09:32:03 -07:00
microcode UPSTREAM: src/cpu: Add required space before opening parenthesis '(' 2016-09-03 23:56:58 -07:00
model_fxx UPSTREAM: src/cpu: Remove unnecessary whitespace 2016-10-11 14:31:47 -07:00
mtrr UPSTREAM: src/cpu: Add required space before opening parenthesis '(' 2016-09-03 23:56:58 -07:00
pi UPSTREAM: spi: Clean up SPI flash driver interface 2016-11-29 17:38:45 -08:00
quadcore UPSTREAM: src/cpu: Add required space before opening parenthesis '(' 2016-09-03 23:56:58 -07:00
smm cpu/amd: de-duplicate MSR include files 2015-11-23 17:16:45 +01:00
socket_754 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_939 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_940 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_AM2 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_AM2r2 cpu/amd: Move model_10xxx to family_10h-family_15h 2015-11-02 23:37:24 +01:00
socket_AM3 cpu/amd: Move model_10xxx to family_10h-family_15h 2015-11-02 23:37:24 +01:00
socket_ASB2 cpu/amd: Move model_10xxx to family_10h-family_15h 2015-11-02 23:37:24 +01:00
socket_C32 cpu/amd: Move model_10xxx to family_10h-family_15h 2015-11-02 23:37:24 +01:00
socket_F x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
socket_F_1207 cpu/amd: Move model_10xxx to family_10h-family_15h 2015-11-02 23:37:24 +01:00
socket_FM2 cpu/amd: Add socket FM2 2016-02-18 01:29:17 +01:00
socket_G34 cpu/amd: Move model_10xxx to family_10h-family_15h 2015-11-02 23:37:24 +01:00
socket_S1G1 x86: remove cpu_incs as romstage Make variable 2015-09-04 15:09:32 +00:00
Kconfig cpu/amd: Add socket FM2 2016-02-18 01:29:17 +01:00
Makefile.inc cpu/amd: Add socket FM2 2016-02-18 01:29:17 +01:00