coreboot/src/include/cpu/amd
Fred Reitberger 8d2bfbce23 soc/amd/sabrina/acpi: Correct VID decoding on Sabrina
Sabrina uses the SVI3 spec for VID tables which is incompatible with the
SVI2 spec used on PCO/CZN. Move the defines from common to soc and
update the decoding for sabrina.

See NDA docs #56413 for SVI3 and #48022 for SVI2 VID tables

TEST=timeless builds on mandolin/majolica for PCO/CZN
     build chausie and verify pstate power is correct in ACPI tables

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I915e962f11615246690c6be1bee3533336a808f2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65001
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2022-06-09 18:06:05 +00:00
..
amd64_save_state.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
cpuid.h soc/amd/picasso: Generate ACPI CRAT objects in cb 2021-01-15 11:27:23 +00:00
microcode.h src/cpu,soc/amd/common/block/cpu: Add preload_microcode 2021-11-29 20:39:32 +00:00
msr.h soc/amd/sabrina/acpi: Correct VID decoding on Sabrina 2022-06-09 18:06:05 +00:00
mtrr.h cpu/amd/mtrr: Remove topmem global variables 2021-11-03 18:36:15 +00:00