coreboot/src/soc
Curtis Chen 150fee60cc soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains
We support all the ADL-P 15W/28W/45W SKU's and map them with the
latest VR configurations. These config values are generated by iPDG
application with ADL-P platform package tool.

RDC Kit ID for the iPDG tools
* Intel(R) Platform Design Studio Installer: 610905
* Intel(R) Platform Design Studio - Libraries: 613643
* Intel(R) Platform Design Studio - Platform ADL-P (Partial): 627345
* Intel(R) Platform Design Studio - Platform ADL-P (Full): 630261

BUG=b:211365920
TEST=Build and check fsp log to confirm the settings are set properly.

Signed-off-by: Curtis Chen <curtis.chen@intel.com>
Change-Id: Ida7a6df0422a9a3972646cb3bdd0112b5efa2755
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2022-01-10 14:26:16 +00:00
..
amd soc/amd/common/block/include/lpc: add comment about RANGE_UNIT values 2022-01-07 13:20:30 +00:00
cavium
example
intel soc/intel/alderlake: Update the ADL-P SKU parameters for VR domains 2022-01-10 14:26:16 +00:00
mediatek soc/mediatek/mt8186: fix incorrect devapc settings 2022-01-07 15:30:07 +00:00
nvidia
qualcomm sc7180: Increase bootblock size and add pre-RAM TCPA buffer 2022-01-08 00:41:02 +00:00
rockchip
samsung
sifive
ti
ucb