Eric Lai 940fb57c06 mb/google/drallion: modify PCIE setting ... Based on HW schematic to modify PCIE setting. BUG=b:138082886 BRANCH=N/A TEST=N/A Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: Ia744a6f3cba76c507c1c43b0a981cb6d89c1a40f Reviewed-on: https://review.coreboot.org/c/coreboot/+/35243 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mathew King <mathewk@chromium.org>		2019-09-05 14:59:38 +00:00
..
acpi	AUTHORS: Move src/acpi copyrights into AUTHORS file	2019-07-30 11:04:14 +00:00
arch	soc/intel/common/timer: Make TSC frequency calculation dynamically	2019-09-02 20:08:20 +00:00
commonlib	commonlib/region: Fix up overflow check in region_is_subregion()	2019-08-19 21:12:31 +00:00
console	Add definition for ENV_ROMSTAGE_OR_BEFORE to <rules.h>	2019-08-26 20:59:45 +00:00
cpu	security/intel: Add TXT infrastructure	2019-09-02 04:52:04 +00:00
device	Split MAYBE_STATIC to _BSS and _NONZERO variants	2019-08-26 20:56:29 +00:00
drivers	drivers/spi/spi_flash.c: Add SPI vendor IDs	2019-09-04 22:40:46 +00:00
ec	ec/kontron/kempld: Select DRIVERS_UART_8250IO	2019-09-02 10:58:15 +00:00
include	drivers/spi/spi_flash.c: Add SPI vendor IDs	2019-09-04 22:40:46 +00:00
lib	arch/x86: Simplify <arch/early_variables.h>	2019-08-26 22:52:10 +00:00
mainboard	mb/google/drallion: modify PCIE setting	2019-09-05 14:59:38 +00:00
northbridge	intel/haswell: Use smm_subregion()	2019-08-28 22:52:47 +00:00
security	security/tpm/tss/tcg-2.0: Add multi digits support to tlcl_extend()	2019-09-05 14:54:52 +00:00
soc	soc/intel/cannonlake: memory spd data debug	2019-09-05 14:56:01 +00:00
southbridge	amdfam10: Remove use of __PRE_RAM__	2019-08-26 02:08:42 +00:00
superio	smsc/superio/sio1007: Fix header name	2019-08-27 11:52:13 +00:00
vendorcode	vendorcode/eltan/security/lib: Always include cb_sha.c for bootblock	2019-08-26 13:46:13 +00:00
Kconfig	ACPI S3: Depend on RELOCATABLE_RAMSTAGE	2019-08-22 06:38:13 +00:00