From the User-Level ISA Specification v2.0:
"We do not mandate atomicity for misaligned accesses so simple
implementations can just use a machine trap and software handler to
handle misaligned accesses." ( http://riscv.org/specifications/)
Spike traps on unaligned accesses.
Change-Id: Ia57786916f4076cc08513f4e331c2deec9cfa785
Original-Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Original-Reviewed-on: https://review.coreboot.org/14983
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry-picked from commit
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| .. | ||
| include/commonlib | ||
| cbfs.c | ||
| fsp_relocate.c | ||
| lz4.c.inc | ||
| lz4_wrapper.c | ||
| Makefile.inc | ||
| mem_pool.c | ||
| region.c | ||