Raul E Rangel 12c6a58857 soc/amd/cezanne: Fill FADT and MADT ... The MADT doesn't populate the IO-APICs yet since we need FSP to configure those. The FADT differs from picasso in the following ways: * The duty_offset is supposed to be 0 * Don't clear x_firmware_ctl_l * Make the extended addresses use MMIO Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ib6c3a01084a0de33894885b47c637a292d252ed4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50510 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2021-02-14 18:13:56 +00:00
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acpi	soc/amd/common/acpi/gpio_bank_lib.asl: Add missing header	2021-02-13 21:38:53 +00:00
block	soc/amd/cezanne: Fill FADT and MADT	2021-02-14 18:13:56 +00:00
fsp	soc/amd/picasso: move chipset_handle_reset to common	2020-12-11 17:44:19 +00:00
vboot	soc/amd/common/vboot: use transfer_buffer_valid function	2020-11-30 16:29:14 +00:00
Kconfig.common	soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig	2020-11-19 14:29:14 +00:00
Makefile.inc	soc/amd/picasso: move chipset_handle_reset to common	2020-12-11 17:44:19 +00:00