Kangheui Won d8928e438b vendorcode: add code for cezanne psp_verstage ... These are mostly copied from picasso code with exception for bl_syscall_public.h. For some SVCs svc number and/or prototype has been changed. Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: I6b431fdbf34fca2747833980ae53c06244905f93 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52750 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>		2021-05-02 18:22:41 +00:00
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amd	vendorcode: add code for cezanne psp_verstage	2021-05-02 18:22:41 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	vc/eltan/security/mboot/Kconfig: Add dependency of VBOOT	2021-04-06 07:01:31 +00:00
google	mb/google: Move ECFW_RW setting for non-ChromeEC boards	2021-04-30 06:48:56 +00:00
intel	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2117_00	2021-04-16 14:37:03 +00:00
mediatek	vendorcode/mt8192: change to short log macro names	2021-03-16 11:19:42 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00