coreboot/src
Stefan Reinauer 10bd772db8 Enable CAR migration on Exynos 5250 and 5420
Despite calling romstage memory CAR in this case, the variables actually
do live in SRAM on the Exynos CPUs. However, in order to share as much
generic code as possible, we're using the same infrastructure here.

Change-Id: I85173c37099a25f3e55980e88120401826cdf29c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/62188
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-on: http://review.coreboot.org/4394
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-12-21 13:00:21 +01:00
..
arch Enable CAR migration on Exynos 5250 and 5420 2013-12-21 13:00:21 +01:00
console snprintf: lockless operation 2013-12-07 19:27:53 +01:00
cpu exynos5420: Fix some clock settings 2013-12-21 10:49:04 +01:00
device Add Kconfig options to override Subsystem Vendor and Device ID 2013-12-21 12:02:40 +01:00
drivers tpm: provide explicit tpm register access 2013-12-21 10:49:11 +01:00
ec chromeec: Add event methods for EC requested throttle 2013-12-21 12:02:14 +01:00
include Add a specific post code for S3 resume failures 2013-12-21 12:02:43 +01:00
lib Add simple hexdump function 2013-12-21 08:25:44 +01:00
mainboard peppy: Set optimal DTLE register values 2013-12-21 12:17:54 +01:00
northbridge haswell: add option to change DqPinsInterleaved 2013-12-21 12:02:56 +01:00
southbridge lynxpoint: Add configuration option for SATA gen3 DTLE registers 2013-12-21 12:03:00 +01:00
superio Correct file permissions. 2013-12-07 00:39:09 +01:00
vendorcode chromeos: Check for recovery reason code in shared data 2013-12-21 07:28:37 +01:00
Kconfig Add GRUB2 payload to build system 2013-11-19 01:07:25 +01:00