coreboot/src/soc
Huayang Duan 4d15d2fc12 mediatek/mt8183: Add DDR driver of memory test part
Write a range of memory with special pattern, and read it back to check
whether the read value same as write.
The test pattern include 8bit offset read write, 16 bit offset read
write, 32bit offset read write, and cross testing.

BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui, and inits DRAM successfully with related
     patches.

Change-Id: I30d5fbd3db2acf36e3058ba4f34558b981fba78c
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/28845
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: You-Cheng Syu <youcheng@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-03 22:22:58 +00:00
..
amd arch/x86: SSE2 implies SSE support 2018-12-28 06:41:29 +00:00
cavium (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
imgtec (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
intel soc/intel/cannonlake: Add cannonlake ACPI GPIO op 2019-01-03 19:50:00 +00:00
mediatek mediatek/mt8183: Add DDR driver of memory test part 2019-01-03 22:22:58 +00:00
nvidia security/vboot: Fix remaining measured boot issues 2018-11-30 10:26:56 +00:00
qualcomm sdm845: Add SPI-NOR flash driver 2018-12-05 14:09:59 +00:00
rockchip security/vboot: Fix remaining measured boot issues 2018-11-30 10:26:56 +00:00
samsung src: Remove duplicated round up function 2018-11-29 12:17:45 +00:00
sifive riscv: fix non-SMP support 2018-12-07 11:37:53 +00:00
ucb mb/emulation/spike-riscv: Implement mtime_init 2018-12-05 13:36:26 +00:00