coreboot/src
Aaron Durbin 107b71c3a3 baytrail: reboot with EC in S0 with no MRC cache and EC in RW
This improves boot time in 2 ways for a firmware upgrade:

1. Normally MRC would detect the S0 state without an MRC cache
   even though it's told to the S5 path. When it observes this
   state a cold reset occurs. The cold reset stays in S5 for
   at least 4 seconds which is time observed by the end user.

2. As the EC was running RW code before the reset after firmware
   upgrade it will still be running the older RW code. Vboot will
   then reboot the EC and the whole system to put the EC into RO
   mode so it can handle the RW update.

The issues are mitigated by detecting the system is in S0 with
no MRC cache and the EC isn't in RO mode. Therefore we can do the
reboot without waiting the 4 secs and the EC is running RO so
the 2nd reboot is not necessary.

BUG=chrome-os-partner:24133
BRANCH=rambi,squawks
TEST=Booted. Updated firmware while in OS. Rebooted. Noted the
     EC reboot before MRC execution.

Change-Id: I1c53d334a5e18c237a74ffbe96f263a7540cd8fe
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182061
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/5040
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-13 21:02:09 +02:00
..
arch SeaBIOS: Fix cpp use 2014-05-11 08:51:54 +02:00
console
cpu Replace SERIAL_CPU_INIT with PARALLEL_CPU_INIT 2014-05-10 11:27:25 +02:00
device
drivers src/drivers/pc80: Remove empty struct keyboard 2014-05-13 10:03:51 +02:00
ec chromeec: add function to reboot on unexpected image 2014-05-13 21:01:52 +02:00
include baytrail: snapshot power state in romstage 2014-05-13 16:11:04 +02:00
lib baytrail: snapshot power state in romstage 2014-05-13 16:11:04 +02:00
mainboard rambi: dptf: Set critical thresholds 2014-05-13 21:01:28 +02:00
northbridge src/drivers/pc80: Remove empty struct keyboard 2014-05-13 10:03:51 +02:00
soc baytrail: reboot with EC in S0 with no MRC cache and EC in RW 2014-05-13 21:02:09 +02:00
southbridge src/*: Remove the last remnants of struct keyboard 2014-05-13 12:14:34 +02:00
superio src/*: Remove the last remnants of struct keyboard 2014-05-13 12:14:34 +02:00
vendorcode
Kconfig Arch-level Kconfig menu cleanup 2014-05-10 14:32:26 +02:00