Karthikeyan Ramasubramanian 0fa0a3e926 soc/amd/sabrina/psp_verstage: Unify SVC ID ... In Sabrina, PSP verstage uses a unified SVC call ID with sub-commands. Update the SVC calls for Sabrina to pass the SVC_VERSTAGE_CMD (command ID) with individual subcommands and the corresponding parameters. BUG=b:220848545, b:217414563 TEST=Build the Skyrim BIOS image with PSP verstage enabled. Change-Id: I56be51aa1dfb00e5f0945014600de2bbbec289db Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63729 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2022-04-24 18:35:27 +00:00
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amd	soc/amd/sabrina/psp_verstage: Unify SVC ID	2022-04-24 18:35:27 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	vc/eltan/security/verified_boot/Makefile: add fmap_config.h dependency	2022-02-22 15:56:03 +00:00
google	tpm: Refactor TPM Kconfig dimensions	2022-04-21 23:07:20 +00:00
intel	vendorcode/intel: Remove UDK2015 headers	2022-03-31 14:21:06 +00:00
mediatek	vc/mediatek/mt8195: Fix rank1 CKE setting for single-rank DRAM	2021-12-01 09:48:17 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00