Meera Ravindranath 0e61a53b06 soc/tigerlake: Update xhci ACPI files for JSP ... ACPI files for xhci in JSL is different from TGL. Hence, renaming xhci.asl to xhci_tgl.asl and adding a new file xhci_jsl.asl for JSL. Also, allowing xhci.asl to choose the correct file based on the SoC selected. BUG=None BRANCH=None TEST=Compilation for JasperLake board is working Change-Id: Ia8e88e02989ff80d7cd1f28941e005cb0d842fcb Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com>		2020-02-15 04:10:46 +00:00
..
amd	soc/amd: unify SMBus support	2020-02-04 16:13:11 +00:00
cavium	soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>	2019-12-19 05:38:43 +00:00
intel	soc/tigerlake: Update xhci ACPI files for JSP	2020-02-15 04:10:46 +00:00
mediatek	drivers/spi/spi_flash: remove spi flash names	2020-01-28 14:44:37 +00:00
nvidia	commonlib: Add commonlib/bsd	2020-01-28 06:36:13 +00:00
qualcomm	sc7180: clock: Fix QUP DFSR configuration for perf levels	2020-02-07 23:12:00 +00:00
rockchip	src: Replace min/max() with MIN/MAX()	2019-12-20 17:49:29 +00:00
samsung	src/soc/samsung: Remove unused <stdlib.h>	2019-12-19 05:39:09 +00:00
sifive	src: Replace min/max() with MIN/MAX()	2019-12-20 17:49:29 +00:00
ucb	mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike.	2019-12-06 15:09:48 +00:00