coreboot/src
Mike Banon 0e596ae760 vendorcode/amd/agesa/f15tn: add Richland RL-A1 to the equivalence table
This small change is required for the successful loading of microcode
from F15TnMicrocodePatch0600110F_Enc.c for the Richland RL-A1 CPUs,
such as A10-5750M found at coreboot-supported Lenovo G505S laptop.

Richland RL-A1 and Trinity TN-A1 CPUs are using the same microcode,
so the Richland RL-A1 IDs should be added to this equivalence table.

Function `GetPatchEquivalentId()` in
`src/vendorcode/amd/agesa/f15tn/Proc/CPU/cpuMicrocodePatch.c`
goes through the equivalence table like below.

  for (i = 0; i < (EquivalencyEntries * 2); i += 2) {
    // check for equivalence
    if (ProcessorRevisionId == MicrocodeEquivalenceTable[i]) {
      *ProcessorEquivalentId = MicrocodeEquivalenceTable[i + 1];
      return (TRUE);
    }
  }

Change-Id: I7a68f2fef74fb4c578c47645f727a9ed45526f69
Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Reviewed-on: https://review.coreboot.org/28204
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: <awokd@danwin1210.me>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-20 17:24:14 +00:00
..
acpi arch/x86: Add common AMD ACPI hardware definitions 2017-11-10 19:15:38 +00:00
arch arm64: Factor out common parts of romstage execution flow 2018-08-17 21:29:46 +00:00
commonlib src/{commonlib,lib}: Fix typo 2018-08-16 18:55:08 +00:00
console arch/x86: Drop leftover ROMCC console support 2018-06-08 03:31:12 +00:00
cpu cpu/intel/common: add function to init cppc_config 2018-08-20 15:53:28 +00:00
device nb/intel/sandybridge: Fill in DIMM serial number 2018-08-20 09:51:22 +00:00
drivers drivers/pc80/rtc: do not warn if CMOS options are unavailable 2018-08-20 10:57:41 +00:00
ec ec/lenovo/pmh7: use read/write function in clear_bit/set_bit 2018-08-20 06:57:18 +00:00
include soc/intel/common/block: Add WHL 2-core SKU 2018-08-20 15:50:57 +00:00
lib src/{commonlib,lib}: Fix typo 2018-08-16 18:55:08 +00:00
mainboard eve: Add PL1 override to 7W 2018-08-20 15:59:15 +00:00
northbridge nb/intel/raminit: Remove unused headers 2018-08-20 09:52:08 +00:00
security cr50: Allow boards to disable powering off EC on cr50 update 2018-08-17 12:27:23 +00:00
soc soc/intel/skylake: Support PL1 override option 2018-08-20 15:58:52 +00:00
southbridge Fix PCI ACPI _OSC methods 2018-08-17 21:09:17 +00:00
superio superio/ite/it8720f: fix power control init 2018-08-17 18:27:00 +00:00
vendorcode vendorcode/amd/agesa/f15tn: add Richland RL-A1 to the equivalence table 2018-08-20 17:24:14 +00:00
Kconfig Kconfig: Make the EM100 config option common 2018-07-16 07:41:14 +00:00