coreboot/src/soc
Aaron Durbin 685ab2a2f2 intel/skylake: ensure the RTC time is set
In 2014 or so the RTC code was changed to assume the ALTCENTRY
register (0x32) as always being utilized for creating an rtc_time.
However, one needs to ensure it's set at least once otherwise
the year field in rtc_time is not sane.

In practice this doesn't matter unless somone wants to use the
full year value. cmos_init() should do the same thing in the
rtc fail case, but the machine I had never had that set correctly.

BUG=chrome-os-partner:47388
BRANCH=None
TEST=Booted glados w/ 0xff ALTCENTRY value. New value is 0x20.

Change-Id: I028f801c5d717a0018ed00df82c25b466d64670c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 7d5be5bc697bef60a264ddc7f67755aa96088d36
Original-Change-Id: I6e12a30c9e08d8c1002e4cef0f143f0f88009e92
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/311264
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/12411
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-13 00:52:54 +01:00
..
broadcom/cygnus arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00
imgtec/pistachio tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
intel intel/skylake: ensure the RTC time is set 2015-11-13 00:52:54 +01:00
marvell/bg4cd arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00
nvidia arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00
qualcomm/ipq806x tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
rockchip/rk3288 arm/arm64: Generalize bootblock C entry point 2015-11-11 05:08:07 +01:00
samsung tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
ucb/riscv tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00