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coreboot/src/soc
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Andrey Petrov 0e46307574 soc/intel/apollolake: Work around FSP-M CAR layout 
As of now FSP-M can not be relocated and it can not be instructed
to use a specific resource for temporary memory. As result coreboot
is forced to use CAR layout dictated by default FSP-M configuration.

Change CAR size to 1MiB, link romstage at such CAR address so it
doesn't overlap with FSP-M's default heap/stack.

Change-Id: I56f78f043099dc835e294dbc081d7506bfad280d
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14804
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-18 07:05:00 +02:00
..
broadcom/cygnus soc/*: fix uart's regwidth specification in cbtables 2016-02-21 12:26:05 +01:00
dmp/vortex86ex dmp/vortex86ex: Merge northbridge and southbridge into soc 2016-05-05 20:06:33 +02:00
imgtec/pistachio drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
intel soc/intel/apollolake: Work around FSP-M CAR layout 2016-05-18 07:05:00 +02:00
marvell drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
mediatek/mt8173 soc/mediatek/mt8173: mt6391: vcore sleep voltage should be 0.7V 2016-05-09 08:36:57 +02:00
nvidia drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
qualcomm qualcomm/ipq40xx: drop comment 2016-05-10 23:47:26 +02:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
samsung soc/samsung: Don't compile in unused uart divider tables 2016-05-11 21:21:41 +02:00
ucb/riscv tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00