coreboot/src/southbridge
Furquan Shaikh 9a2bc7d727 UPSTREAM: spi: Define and use spi_ctrlr structure
1. Define a new structure spi_ctrlr that allows platforms to define
callbacks for spi operations (claim bus, release bus, transfer).
2. Add a new member (pointer to spi_ctrlr structure) in spi_slave
structure which will be initialized by call to spi_setup_slave.
3. Define spi_claim_bus, spi_release_bus and spi_xfer in spi-generic.c
which will make appropriate calls to ctrlr functions.

CQ-DEPEND=CL:417080,CL:417087,CL:417958
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully

Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17684
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: Icb2326e3aab1e8f4bef53f553f82b3836358c55e
Reviewed-on: https://chromium-review.googlesource.com/417081
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-08 12:30:16 -08:00
..
amd UPSTREAM: spi: Define and use spi_ctrlr structure 2016-12-08 12:30:16 -08:00
broadcom UPSTREAM: sb/broadcom/bcm5785/reset.c: Use tab for indents 2016-11-30 02:53:28 -08:00
intel UPSTREAM: spi: Define and use spi_ctrlr structure 2016-12-08 12:30:16 -08:00
nvidia UPSTREAM: southbridge/nvidia: Remove commented code 2016-10-13 04:31:23 -07:00
ricoh/rl5c476 UPSTREAM: sb/ricoh/rl5c476/rl5c476.c: Use tab for indents 2016-11-30 02:53:26 -08:00
sis/sis966 UPSTREAM: src/southbridge: Remove unnecessary whitespace 2016-10-11 14:31:52 -07:00
ti southbridge/ti: Update license headers 2016-04-13 17:36:00 +02:00
via UPSTREAM: via/k8t890: Compose a list of PCI IDs 2016-11-29 17:38:57 -08:00