coreboot/src/northbridge
Patrick Rudolph 0dea366908 UPSTREAM: nb/intel/sandybridge/raminit: Split raminit.c
Split raminit.c into smaller parts. Move all functions that will
be used by chip-specific code into raminit_common.c.
The chip-specific changes includes new configuration values
for IvyBridge and 100Mhz reference clock support, including new
frequencies.

No functionality is changed.

Tested on Lenovo T420.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/17604
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

Change-Id: If7bb5949f4b771430f3dba1b754ad241a7e8426b
Reviewed-on: https://chromium-review.googlesource.com/417082
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-12-08 12:30:18 -08:00
..
amd UPSTREAM: AMD binaryPI: Switch to MMCONF_SUPPORT_DEFAULT 2016-12-02 14:22:50 -08:00
intel UPSTREAM: nb/intel/sandybridge/raminit: Split raminit.c 2016-12-08 12:30:18 -08:00
via UPSTREAM: Remove explicit select MMCONF_SUPPORT 2016-11-29 17:38:33 -08:00