47f1b798e4
The current approach has two problems: - Just because the source address is 0 does not mean it is no specifically set. A bunch of mainboards specify their APOB_NV base address at 0 in their FMAP files. - There is no AMD SOC that has support for this binary, but doesn't give AMDFWTOOL the base address. It would also not work considering that AMD common/block/apob code gets the region from the FMAP. Therefore just remove the check since no mainboard will ever enter the else branch. tested: binary identical for at least 1 mainboard on each SOC generation. Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: Ic85d6b25c95ab12dbcc72d17158591891dd04e97 Reviewed-on: https://review.coreboot.org/c/coreboot/+/87292 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> |
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| .. | ||
| .gitignore | ||
| amdfwread.c | ||
| amdfwtool.c | ||
| amdfwtool.h | ||
| data_parse.c | ||
| description.md | ||
| handle_file.c | ||
| Makefile | ||
| Makefile.mk | ||
| opts.c | ||
| signed_psp.c | ||