coreboot/src/arch/riscv
Jacob Garber 0c4ed4bd7e arch, include, soc: Use common stdint.h
There are only minimal differences between the architecture specific
stdint.h implementations, so let's tidy them up and merge them together
into a single file. In particular,

- Use 'unsigned long' for uintptr_t. This was already the case for x86
  and riscv, while arm and mips used 'unsigned int', and arm64 and ppc64
  used 'unsigned long long'. This change allows using a single integer
  type for uintptr_t across all architectures, and brings it into
  consistency with the rest of the code base, which generally uses
  'unsigned long' for memory addresses anyway. This change required
  fixing several assumptions about integer types in the arm code.
- Use _Bool as the boolean type. This is a specialized boolean type that
  was introduced in C99, and is preferrable over hacking booleans
  using integers. romcc sadly does not support _Bool, so for that we
  stick with the old uint8_t.
- Drop the least and fast integer types. They aren't used
  anywhere in the code base and are an unnecessary maintenance burden.
  Using the standard fixed width types is essentially always better anyway.
- Drop the UINT64_C() macro. It also isn't used anywhere and doesn't
  provide anything that a (uint64_t) cast doesn't.
- Implement the rest of the MIN and MAX numerical limits.
- Use static assertions to check that the integer widths are correct.

Change-Id: I6b52f37793151041b7bdee9ec3708bfad69617b2
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-07-12 17:40:24 +00:00
..
include arch, include, soc: Use common stdint.h 2019-07-12 17:40:24 +00:00
arch_timer.c device/mmio.h: Add include file for MMIO ops 2019-03-04 15:57:39 +00:00
boot.c riscv: workaround selfboot putting the coreboot table into prog_entry_arg 2019-06-23 12:15:23 +00:00
bootblock.S riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
fp_asm.S riscv: update misaligned memory access exception handling 2018-09-10 15:03:58 +00:00
Kconfig arch/riscv: Make RISCV specific options depend on ARCH_RISCV 2019-07-02 16:16:31 +00:00
Makefile.inc riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
mcall.c arch/riscv/mcall: Drop debug code 2019-06-28 07:35:56 +00:00
misaligned.c src/arch/riscv/misaligned.c: Fix an off-by-one error when loading the opcode 2018-10-30 02:07:58 +00:00
misc.c arch/riscv: provide a monotonic timer 2018-09-14 09:28:06 +00:00
payload.c riscv: use mret to invoke M-mode payload and disable interrupts 2019-06-23 12:14:54 +00:00
pmp.c riscv: add physical memory protection (PMP) support 2018-10-11 10:56:54 +00:00
ramstage.S riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
sbi.c src: Use include <console/console.h> when appropriate 2019-04-23 10:01:21 +00:00
smp.c riscv: Add initial support for 32bit boards 2019-02-13 04:49:14 +00:00
stages.c riscv: Simplify payload handling 2019-02-02 16:53:21 +00:00
tables.c lib: add common write_tables() implementation 2016-04-21 20:49:05 +02:00
trap_handler.c src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
trap_util.S arch/riscv: Align trap_entry to 4 bytes, as required by spec 2018-02-20 20:44:43 +00:00
virtual_memory.c arch/riscv: Don't set FPU state to "dirty" 2018-12-19 05:46:07 +00:00