coreboot/src/soc
Marshall Dawson 0bd0806d2f soc/amd/picasso: Reduce 48M out configuration
Picasso has only a single 48M output.  Simplify the setup function.
Note that while the feature is similar to older products, the register
definition and Enable bit has changed.

Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Iebaf5219fdcd3145a4faf906f656a7fbdc7e0c36
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33768
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2019-08-09 20:23:50 +00:00
..
amd soc/amd/picasso: Reduce 48M out configuration 2019-08-09 20:23:50 +00:00
cavium arch/non-x86: Flip HAVE_MONOTONIC_TIMER default 2019-07-09 13:07:38 +00:00
imgtec arch/non-x86: Flip HAVE_MONOTONIC_TIMER default 2019-07-09 13:07:38 +00:00
intel cpu/x86/smm: Drop SMI handler address from struct 2019-08-09 13:13:41 +00:00
mediatek soc/mediatek/mt8183: Add display controller driver 2019-08-09 05:42:29 +00:00
nvidia soc/nvidia/tegra210: Fix potential NULL pointer dereference 2019-08-09 01:28:04 +00:00
qualcomm soc/qualcomm/qcs405: Handle invalid QUP and BLSP 2019-07-29 06:09:17 +00:00
rockchip soc/{qualcomm,rockchip}: Use 'include <stdlib.h>' when appropriate 2019-07-25 16:06:54 +00:00
samsung soc/samsung/exynos5420: Refactor fimd vidtcon access 2019-08-02 10:00:09 +00:00
sifive soc/sifive/fu540: Add opensbi support 2019-08-05 06:17:24 +00:00
ucb lib: Rewrite qemu-armv7 ramdetect 2019-07-28 11:31:42 +00:00