Edward O'Callaghan 0bb0affede arch/x86/boot: Indent mpspec.c and make a loop more legible ... Fix some space->tab style and a for-for loop embedded to be more understandable/readable. Change-Id: I740c544e8c9330e6efbbd66a5c1e6a4a33d1a75e Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5631 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>		2014-05-02 12:05:39 +02:00
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arch	arch/x86/boot: Indent mpspec.c and make a loop more legible	2014-05-02 12:05:39 +02:00
console	console: Fix UART selection prompt	2014-04-30 23:47:28 +02:00
cpu	console: Move UART port defaults to mainboard	2014-04-30 07:00:43 +02:00
device	device: Conditionally bypass oprom execution	2014-05-01 15:39:52 +02:00
drivers	console: Drop EARLY_CONSOLE option	2014-04-30 07:00:20 +02:00
ec	Declare recovery and developer modes outside ChromeOS	2014-05-01 15:38:41 +02:00
include	ChromeOS: Use common fill_lb_gpio()	2014-05-01 15:40:11 +02:00
lib	ChromeOS: Use common fill_lb_gpio()	2014-05-01 15:40:11 +02:00
mainboard	asrock/e350m1/devicetree.cb: Correctly indent device line	2014-05-02 12:04:36 +02:00
northbridge	ChromeOS: Remove oprom_is_loaded	2014-05-01 15:39:26 +02:00
soc	baytrail: Add default _OSC method	2014-04-30 23:12:03 +02:00
southbridge	AGESA SPI: Fix Kconfig options	2014-04-29 17:31:40 +02:00
superio	superio/winbond/w83627thg: Remove w83627thg_enable_serial symbol	2014-05-02 09:44:58 +02:00
vendorcode	Build without ChromeOS	2014-05-01 15:40:39 +02:00
Kconfig	Declare recovery and developer modes outside ChromeOS	2014-05-01 15:38:41 +02:00