coreboot/src/soc/intel
Kyösti Mälkki 0a4457ff44 lib/stage_cache: Refactor Kconfig options
Add explicit CBMEM_STAGE_CACHE option. Rename
CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM to TSEG_STAGE_CACHE.

Platforms with SMM_TSEG=y always need to implement
stage_cache_external_region(). It is allowed to return with a
region of size 0 to effectively disable the cache.

There are no provisions in Kconfig to degrade from
TSEG_STAGE_CACHE to CBMEM_STAGE_CACHE.

As a security measure CBMEM_STAGE_CACHE default is changed to
disabled. AGESA platforms without TSEG will experience slower
S3 resume speed unless they explicitly select the option.

Change-Id: Ibbdc701ea85b5a3208ca4e98c428b05b6d4e5340
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34664
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-08-08 04:50:33 +00:00
..
apollolake lib/stage_cache: Refactor Kconfig options 2019-08-08 04:50:33 +00:00
baytrail intel/baytrail,broadwell: Move stage cache support function 2019-08-03 17:34:40 +00:00
braswell lib/stage_cache: Refactor Kconfig options 2019-08-08 04:50:33 +00:00
broadwell lib/stage_cache: Refactor Kconfig options 2019-08-08 04:50:33 +00:00
cannonlake lib/stage_cache: Refactor Kconfig options 2019-08-08 04:50:33 +00:00
common intel/apollolake: Replace smm_region_info() with smm_region() 2019-08-07 05:48:21 +00:00
denverton_ns cpu/x86/smm: Promote smm_subregion() 2019-08-07 05:47:33 +00:00
fsp_baytrail fsp_baytrail/fsp_broadwell_de: Sort entries in Makefile.inc 2019-08-08 02:26:51 +00:00
fsp_broadwell_de fsp_baytrail/fsp_broadwell_de: Sort entries in Makefile.inc 2019-08-08 02:26:51 +00:00
icelake lib/stage_cache: Refactor Kconfig options 2019-08-08 04:50:33 +00:00
quark soc/intel: Use config_of() 2019-07-18 15:25:35 +00:00
skylake lib/stage_cache: Refactor Kconfig options 2019-08-08 04:50:33 +00:00
Kconfig cbfstool: Drop update-fit option 2019-06-24 09:45:00 +00:00