GPIOs which trigger SMIs set the GPIO_SMI_STS status bits in SMI_STS
register. This patch also sets the SMI_EN bit in enable register for
each community based on GPIOROUTSMI bit in gpio pad. When SMI on a
gpio happens status needs to be gathered on gpio number which is done
by reading the GPI_SMI_STS and GPI_SMI_EN registers.
BUG=chrome-os-partner:54977
TEST=When system is in firmware mode executing the command
lidclose from ec console shuts down the system.
Change-Id: Id89a526106d1989c2bd3416ab81913e6cf743d17
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/15833
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
09115a92f6