coreboot/src
Aaron Durbin 08e36c94ce tegra132: add base addresses to funit structures
To provide easier access to the base addresses of the controllers
by funit identifier add the base addresses to the data structure.

BUG=chrome-os-partner:31251
BUG=chrome-os-partner:31106
BRANCH=None
TEST=Built.

Change-Id: I427d432beef36e6342c188d607c0e33b3845c0e1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c8f09e61e3
Original-Change-Id: Iff5564b250dcf2038252d54a4caec3df5f7f3de7
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/212169
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/8934
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-26 00:27:16 +01:00
..
arch arm64: handle non-cacheable normal memory 2015-03-26 00:27:07 +01:00
console console: Convert cbmem log line endings to UNIX standard 2015-03-25 17:25:14 +01:00
cpu cpu/amd/model_10xxx: Increase preram buffer size to 32k 2015-03-25 17:26:48 +01:00
device PCIe: Revise L1 Sub-State support 2015-03-23 13:11:18 +01:00
drivers vboot2: read secdata and nvdata 2015-03-23 19:51:47 +01:00
ec chromeec: use stopwatch API 2015-03-21 17:00:26 +01:00
include fix how to interpret board id read from gpios 2015-03-26 00:26:50 +01:00
lib fix how to interpret board id read from gpios 2015-03-26 00:26:50 +01:00
mainboard ryu: convert hardware initialization to funit API 2015-03-26 00:27:12 +01:00
northbridge cpu/amd/model_10xxx: Add support for early cbmem 2015-03-19 08:28:43 +01:00
soc tegra132: add base addresses to funit structures 2015-03-26 00:27:16 +01:00
southbridge CBMEM: Add LATE_CBMEM_INIT guards 2015-03-19 06:17:07 +01:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode rk3288: update romstage & mainboard 2015-03-24 15:25:31 +01:00
Kconfig Enable publishing of board ID where supported 2015-03-23 17:20:24 +01:00