coreboot/src/cpu/intel
Kyösti Mälkki 08bf481667 UPSTREAM: intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE
Match the definition and use of these variable with haswell, such that
DCACHE_RAM_MRC_VAR_SIZE is not included in DCACHE_RAM_SIZE.

Change-Id: I5af20f63cd0cb631d39f7c7fe0e2a99ebd3ce986
Original-Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/15761
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/363384
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2016-07-26 12:27:09 -07:00
..
car UPSTREAM: intel car: Unify postcodes 2016-07-23 13:04:57 -07:00
common/acpi
ep80579
fit
fsp_model_206ax
fsp_model_406dx
haswell UPSTREAM: intel/haswell: Remove useless MTRR clear 2016-07-24 10:19:30 -07:00
hyperthreading
microcode
model_6bx
model_6dx
model_6ex UPSTREAM: intel car: Unify postcodes 2016-07-23 13:04:57 -07:00
model_6fx
model_6xx
model_65x
model_67x
model_68x
model_69x
model_106cx UPSTREAM: intel model_106cx: Include CAR from socket directory 2016-07-23 13:04:50 -07:00
model_206ax UPSTREAM: intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE 2016-07-26 12:27:09 -07:00
model_1067x
model_2065x UPSTREAM: intel car: Unify postcodes 2016-07-23 13:04:57 -07:00
model_f0x
model_f1x
model_f2x
model_f3x
model_f4x
slot_1 UPSTREAM: intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:45 -07:00
slot_2
smm/gen1
socket_441 UPSTREAM: intel model_106cx: Include CAR from socket directory 2016-07-23 13:04:50 -07:00
socket_BGA956 UPSTREAM: intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:55 -07:00
socket_BGA1284
socket_FC_PGA370 UPSTREAM: intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:45 -07:00
socket_FCBGA559 UPSTREAM: intel model_106cx: Include CAR from socket directory 2016-07-23 13:04:50 -07:00
socket_LGA771 UPSTREAM: intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:55 -07:00
socket_LGA775 UPSTREAM: intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:55 -07:00
socket_LGA1155
socket_mFCBGA479 UPSTREAM: intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:45 -07:00
socket_mFCPGA478 UPSTREAM: intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:55 -07:00
socket_mPGA478
socket_mPGA479M UPSTREAM: intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:45 -07:00
socket_mPGA603
socket_mPGA604 UPSTREAM: intel/car/cache_as_ram_ht.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:47 -07:00
socket_PGA370 UPSTREAM: intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP 2016-06-22 10:40:45 -07:00
socket_rPGA988B
socket_rPGA989
speedstep
thermal_monitoring
turbo
Kconfig
Makefile.inc