coreboot/src
Angel Pons 085649440b mb/google/poppy: Do not let FSP-S init UART 0
FSP-S configures the GPIOs for enabled SerialIO devices. However, Poppy
boards only enable UART 0 because it's function 0 of PCI device 30, and
the PCI specification requires that function 0 of multifunction devices
be implemented if other functions are implemented as well.

Nautilus got remedied in commit 8a1f095e50
(mb/google/poppy/variants/nautilus: Update camera power enable GPIOs) by
using `PchSerialIoSkipInit` for UART 0, which tells FSP to not touch the
SerialIO device. This way, it remains enabled and the GPIO settings will
not be overwritten by FSP.

However, not all variants do this, but use some UART 0 pads as GPIOs. To
prevent any issues, configure UART 0 as `PchSerialIoSkipInit` on all the
variants.

Change-Id: I7e3a61769ef9e3b348ce84c663f67d3c4c5d9485
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55236
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-08-31 15:12:45 +00:00
..
acpi acpi: Fill fadt->century based on Kconfig 2021-08-19 18:16:04 +00:00
arch arch/x86: smbios write 7 table using deterministic cache functions 2021-08-11 05:50:02 +00:00
commonlib elog: Define constant for RW region name 2021-08-26 18:50:56 +00:00
console console/hw-debug_sink: Update for fast/slow console distinction 2021-08-04 15:15:45 +00:00
cpu AGESA f15tn: Hook up IDS options to Kconfig 2021-08-22 22:17:02 +00:00
device device/mipi: Move to drivers/mipi 2021-08-26 15:18:45 +00:00
drivers elog: Define constant for RW region name 2021-08-26 18:50:56 +00:00
ec ec/google/chromeec: Add code for KEY_MICMUTE and KEY_KBD_BKLIGHT_TOGGLE 2021-08-06 16:26:51 +00:00
include device/mipi: Move to drivers/mipi 2021-08-26 15:18:45 +00:00
lib Move post_codes.h to commonlib/console/ 2021-08-04 15:15:51 +00:00
mainboard mb/google/poppy: Do not let FSP-S init UART 0 2021-08-31 15:12:45 +00:00
northbridge nb/intel/haswell: Move MRC glue code into a subfolder 2021-08-02 14:59:45 +00:00
security vboot/secdata_tpm: Add WRITE_STCLEAR attr to RW ARB spaces 2021-07-26 07:27:48 +00:00
soc soc/amd/cezanne/fch: implement and use fch_clk_output_48Mhz 2021-08-30 19:46:17 +00:00
southbridge acpi: Fill fadt->century based on Kconfig 2021-08-19 18:16:04 +00:00
superio superio/nuvoton/nct6776: Correct the definition of NCT6776_GPIOBASE 2021-08-29 16:41:12 +00:00
vendorcode AGESA f15tn: Fix building IDS tracing support 2021-08-22 22:17:32 +00:00
Kconfig option: Allow mainboards to implement the API 2021-05-28 11:37:25 +00:00