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Frank Vibrans 0822ad8b19 This code fixes a number of build issues related to the AMD Agesa code. The particular issues are global variables existing in romstage and the use of GCC intrinsics in the build. The former issue will be addressed shortly, and the latter issue requires community assistance. This code is dependent on the AMD Family 14h mainboard code. 
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-02-14 18:47:37 +00:00
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arch/x86 This code fixes a number of build issues related to the AMD Agesa code. The particular issues are global variables existing in romstage and the use of GCC intrinsics in the build. The former issue will be addressed shortly, and the latter issue requires community assistance. This code is dependent on the AMD Family 14h mainboard code. 2011-02-14 18:47:37 +00:00
boot Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
console rename CONFIG_SERIAL_POST to CONFIG_CONSOLE_POST 2011-01-28 07:47:35 +00:00
cpu Add AMD cpu wrapper code. Patch 4 of 8. 2011-02-14 18:42:12 +00:00
devices Wrap CONFIG_MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_ID in weak functions 2011-02-03 09:14:40 +00:00
drivers All the values should stay untouched or be set automatically by the resource 2010-12-26 16:49:57 +00:00
ec pmh7.[ch]: Add missing license headers. 2011-02-02 23:56:15 +00:00
include Wrap CONFIG_MAINBOARD_PCI_SUBSYSTEM_{VENDOR,DEVICE}_ID in weak functions 2011-02-03 09:14:40 +00:00
lib This patch gets usbdebug console working in romstage. 2011-01-28 08:05:54 +00:00
mainboard rk886ex lacked EC_ACPI 2011-01-28 01:03:18 +00:00
northbridge This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code. 2011-02-14 18:35:15 +00:00
pc80 Build failure because of src/pc80/mc146818rtc_early.c unused variable 2011-01-31 21:03:14 +00:00
southbridge This code provides southbridge initialization for SB800 south bridges. It is dependent on the AMD CIMx/SB800 code. 2011-02-14 18:38:14 +00:00
superio Place the W83627EHG MIDI base address mask in the correct position. 2011-02-08 02:36:39 +00:00
vendorcode Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8. 2011-02-14 18:30:54 +00:00
Kconfig Add new ec subdir for Embedded Controllers and common ACPI EC support 2011-01-27 11:43:03 +00:00
Kconfig.deprecated_options move single options out of main menu and remove stray "options" 2011-01-05 02:27:53 +00:00