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Marshall Dawson 07132a4c32 amd/stoneyridge: Add PSP definitions southbridge and iomap 
Define the PSP's BAR3 and BAR3 enable bit.  Define a default base
address for BAR3.

Change-Id: I59a0ec59b7c6bbc6468b3096ec8d025832349f44
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/22250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-11-08 21:59:14 +00:00
..
acpi src/acpi: Add guards on all header files 2017-08-01 23:04:27 +00:00
arch arch/riscv: Use a separate trap stack 2017-11-07 12:30:38 +00:00
commonlib commonlib/helpers.h: Include stddef.h 2017-11-04 00:32:13 +00:00
console console: Ignore loglevel in nvram until ramstage 2017-09-25 13:35:29 +00:00
cpu Microcode: add dependency to header files 2017-11-07 12:16:58 +00:00
device device/device_util: Add string for DEVICE_PATH_NONE 2017-11-07 12:32:13 +00:00
drivers src: Fix all Siemens copyrights 2017-11-07 12:33:51 +00:00
ec ec/lenovo/h8: Clear EC output queue before enablement 2017-11-07 12:26:51 +00:00
include src: Fix all Siemens copyrights 2017-11-07 12:33:51 +00:00
lib src: Fix all Siemens copyrights 2017-11-07 12:33:51 +00:00
mainboard google/fizz: add VBOOT_PHYSICAL_REC_SWITCH config 2017-11-08 16:26:26 +00:00
northbridge nb/intel/gm45: Enable LAPIC monotonic timer 2017-11-03 16:19:27 +00:00
security security/vboot: Move vboot2 to security kconfig section 2017-10-22 02:14:46 +00:00
soc amd/stoneyridge: Add PSP definitions southbridge and iomap 2017-11-08 21:59:14 +00:00
southbridge sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t 2017-11-04 00:33:26 +00:00
superio superio/acpi/pnp.asl: Fix PNP_READ_DMA/PNP_WRITE_DMA macros 2017-10-25 14:32:39 +00:00
vendorcode src: Fix all Siemens copyrights 2017-11-07 12:33:51 +00:00
Kconfig intel/common/smbus: increase spd read performance 2017-10-31 15:49:55 +00:00