Daisuke Nojiri 05c370e904 veyron: add config values for fmap and tpm ... this change adds missing config values needed to access fmap and tpm. BUG=None TEST=Booted Veyron Pinky BRANCH=None Change-Id: If74ebe84bd9117edd70f62f67a1745e71bbbcdb7 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 58d2f40c85 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I534d060c9e61a9cfd1ee4efe709cf1e30ca2663f Original-Reviewed-on: https://chromium-review.googlesource.com/218874 Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/8873 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)		2015-03-24 15:27:33 +01:00
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arch	vboot2: separate verstage from bootblock	2015-03-24 14:48:04 +01:00
console	console: Allow bootblock console on MIPS	2015-03-23 15:35:06 +01:00
cpu	imgtec/danube: Add support for ImgTec Danube SoC	2015-03-21 16:57:08 +01:00
device	PCIe: Revise L1 Sub-State support	2015-03-23 13:11:18 +01:00
drivers	vboot2: read secdata and nvdata	2015-03-23 19:51:47 +01:00
ec	chromeec: use stopwatch API	2015-03-21 17:00:26 +01:00
include	vboot2: factory-initialize kernel space in tpm	2015-03-24 15:19:54 +01:00
lib	vboot2: load decompressed stage directly to load address	2015-03-24 15:19:21 +01:00
mainboard	veyron: add config values for fmap and tpm	2015-03-24 15:27:33 +01:00
northbridge	cpu/amd/model_10xxx: Add support for early cbmem	2015-03-19 08:28:43 +01:00
soc	rk3288: sync i2c driver with depthcharge	2015-03-24 15:27:29 +01:00
southbridge	CBMEM: Add LATE_CBMEM_INIT guards	2015-03-19 06:17:07 +01:00
superio	superio: ite8772f: Exit extemp busy state	2015-03-21 08:44:28 +01:00
vendorcode	rk3288: update romstage & mainboard	2015-03-24 15:25:31 +01:00
Kconfig	Enable publishing of board ID where supported	2015-03-23 17:20:24 +01:00