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Duncan Laurie 04c5bae390 Define post codes for OS boot and resume And move the pre-hardwaremain post code to 0x79 so it comes before hardwaremain at 0x80. Emit these codes from ACPI OS resume vector as well as the finalize step in bd82x6x southbridge. Change-Id: I7f258998a2f6549016e99b67bc21f7c59d2bcf9e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1702 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>	2012-11-12 04:21:59 +01:00
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x86	Define post codes for OS boot and resume	2012-11-12 04:21:59 +01:00

Duncan Laurie 04c5bae390 Define post codes for OS boot and resume

And move the pre-hardwaremain post code to 0x79
so it comes before hardwaremain at 0x80.

Emit these codes from ACPI OS resume vector as well
as the finalize step in bd82x6x southbridge.

Change-Id: I7f258998a2f6549016e99b67bc21f7c59d2bcf9e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1702
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

2012-11-12 04:21:59 +01:00

x86

Define post codes for OS boot and resume

2012-11-12 04:21:59 +01:00