coreboot/src
Duncan Laurie 045222f312 ec: Remove hardcoded GPI offset in EC SCI
With LynxPoint-LP the SCI GPE is no longer a GPIO
that is offset by 16.  Remove the Add and fix up
the link definition so it is still accurate.

Change-Id: I091141183a09345b5ffe28365583e48019f9f5e5
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/3742
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-07-10 21:42:51 +02:00
..
arch ARM: Fix up page table/cachability management. 2013-07-10 21:06:34 +02:00
console console: Fix spelling 2013-07-10 20:16:50 +02:00
cpu exynos5250: Clear the framebuffer before making it uncacheable. 2013-07-10 21:42:41 +02:00
device device: Fix spelling 2013-07-10 20:17:25 +02:00
drivers drivers: Fix spelling 2013-07-10 20:18:15 +02:00
ec ec: Remove hardcoded GPI offset in EC SCI 2013-07-10 21:42:51 +02:00
include ARMv7: De-uboot-ify Exynos5250 code 2013-07-10 20:08:15 +02:00
lib lib: Fix spelling 2013-07-10 20:17:51 +02:00
mainboard ec: Remove hardcoded GPI offset in EC SCI 2013-07-10 21:42:51 +02:00
northbridge Rename hardwaremain() to main() 2013-07-10 02:40:30 +02:00
southbridge Drop some duplicates of PCI-e config functions 2013-07-10 01:24:42 +02:00
superio w83627hf/acpi: Fix endianess error in floppy drive enumeration code 2013-07-10 02:54:01 +02:00
vendorcode amd/agesa/f15/Lib/amdlib.c: Add missing breaks to switch statement 2013-06-28 01:35:20 +02:00
Kconfig Yabel : Add tracing option needed by i915tool. 2013-06-04 22:57:26 +02:00