coreboot/src
David Hendricks 032c843817 spi_flash: Move (de-)assertion of /CS to single location
This consolidates all calls to spi_claim_bus() and spi_release_bus()
to a single location where spi_xfer() is called. This avoids confusing
(and potentially redundant) calls that were being done throughout the
generic spi_flash.c functions and chip-specific functions.

I don't think the current approach could even work since many chip
drivers assert /CS once and then issue multiple commands such as page
program followed by reading the status register. I suspect the reason
we didn't notice it on x86 is because the ICH/PCH handled each
individual command correctly (spi_claim_bus() and spi_release_bus()
are noops) in spite of the broken code.

BUG=none
BRANCH=none
TEST=tested on nyan and link
Signed-off-by: David Hendricks <dhendrix@chromium.org>

Original-Change-Id: I3257e2f6a2820834f4c9018069f90fcf2bab05f6
Original-Reviewed-on: https://chromium-review.googlesource.com/194510
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: David Hendricks <dhendrix@chromium.org>
(cherry picked from commit d3394d34fb)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ieb62309b18090d8f974f91a6e448af3d65dd3d1d
Reviewed-on: http://review.coreboot.org/7829
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-17 04:51:28 +01:00
..
arch arm: Add support for a preram_cbmem_console symbol. 2014-12-15 23:27:53 +01:00
console ipq8064: prepare UART driver for use in coreboot 2014-12-05 20:22:47 +01:00
cpu Drop SC520 and related boards 2014-12-16 21:18:43 +01:00
device ddr3: Plumber DIMM type to parsed structure. 2014-12-07 15:18:41 +01:00
drivers spi_flash: Move (de-)assertion of /CS to single location 2014-12-17 04:51:28 +01:00
ec i2c: Replace the i2c API. 2014-12-16 00:02:43 +01:00
include elog: Do not attempt to init SPI 2014-12-17 02:12:03 +01:00
lib edid: initialize has_valid_detailed_blocks as 1 2014-12-17 04:51:10 +01:00
mainboard blaze: Change samsung RAMCODE to samsung-2GB-204/samsung-4GB-204 2014-12-16 23:31:29 +01:00
northbridge Drop GX1, CS5330 and related boards 2014-12-16 21:17:36 +01:00
soc tegra124: change PLLD VCO calculation algorithm 2014-12-17 01:07:53 +01:00
southbridge southbridge/sis: Spelling/comment fixes 2014-12-17 02:30:12 +01:00
superio Drop obsolete SuperIOs used by GX1 systems only 2014-12-16 21:18:07 +01:00
vendorcode amd/agesa/f*/Lib/amdlib.c: Integer overflow in loop construct 2014-12-16 17:21:44 +01:00
Kconfig Kconfig: Remove ACPI_SSDTX_NUM. 2014-12-07 21:06:34 +01:00