coreboot/src/soc
Aaron Durbin 01ca366858 tegra132: add spintable support
Until PSCI is functional the other core still needs to be
brought up in the kernel. The kernel boots these cpus with
the spin table which is just an address in memory to monitor
a jump location.

BUG=chrome-os-partner:31545
BRANCH=None
TEST=Built and brought up secondary core in linux.

Change-Id: Ieaf19cd70aff3e6c8de932e04b1b5aba71822a97
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/214777
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2014-08-29 03:14:54 +00:00
..
intel broadwell: pcie updates from 2.1.0 ref code 2014-08-28 04:23:54 +00:00
nvidia tegra132: add spintable support 2014-08-29 03:14:54 +00:00
qualcomm ipq806x: implement GPIO API 2014-07-30 23:40:58 +00:00
rockchip coreboot: rk3288: add gpio 2014-08-28 20:12:56 +00:00
samsung coreboot classes: Add dynamic classes to coreboot 2014-07-28 19:19:34 +00:00
Kconfig coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00
Makefile.inc coreboot: rk3288: Add a stub implementation of the rk3288 SOC 2014-07-23 06:46:35 +00:00