Lee Leahy 01728bb2ed soc/intel/quark: Prepare for FSP2.0 support ... Split the original contents of romstage.c into car.c, romstage.c and fsp1_1.c. TEST=Build and run on Galileo Gen2 Change-Id: I6392d7382e383ea2087afa6bf45b1f087ba78d79 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15862 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2016-08-03 17:47:53 +02:00
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broadcom/cygnus	Remove non-ascii & unprintable characters	2016-08-01 21:44:45 +02:00
dmp/vortex86ex	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
imgtec/pistachio	drivers/uart: Use uart_platform_refclk for all UART models	2016-05-09 18:45:44 +02:00
intel	soc/intel/quark: Prepare for FSP2.0 support	2016-08-03 17:47:53 +02:00
marvell	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
mediatek/mt8173	Remove extra newlines from the end of all coreboot files.	2016-07-31 18:19:33 +02:00
nvidia	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
qualcomm	google/gale: Change board ID definition.	2016-07-31 18:26:53 +02:00
rdc/r8610	rdc/r8610: Move to src/soc	2016-05-05 20:08:58 +02:00
rockchip	rockchip/rk3399: sdram: correct controller vref setting	2016-07-28 23:53:57 +02:00
samsung	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
ucb/riscv	arch/riscv: Move CBMEM into RAM	2016-07-15 03:01:02 +02:00