Lee Leahy 9ee9cbf549 UPSTREAM: arch/x86: Share storage data structures between early stages ... Define a common area in CAR so that the storage data structures can be shared between stages. TEST=Build and run on Reef Change-Id: I300059af6ef55d777eb9606c88f0a7f91d024b0c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 43d0d0d1f4 Original-Change-Id: I20a01b850a31df9887a428bf07ca476c8410d33e Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://review.coreboot.org/19300 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Martin Roth <martinroth@google.com> Original-Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://chromium-review.googlesource.com/494046 Commit-Ready: Furquan Shaikh <furquan@chromium.org>		2017-05-02 20:24:09 -07:00
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arm	UPSTREAM: Remove libverstage as separate library and source file class	2017-03-29 13:43:09 -07:00
arm64	UPSTREAM: Remove libverstage as separate library and source file class	2017-03-29 13:43:09 -07:00
mips	build system: remove CBFSTOOL_PRE1_OPTS	2016-05-03 11:40:49 +02:00
power8	UPSTREAM: region: Add writeat and eraseat support	2016-06-27 17:13:18 -07:00
riscv	UPSTREAM: riscv: Suppress invalid coverity errors	2017-02-21 06:44:26 -08:00
x86	UPSTREAM: arch/x86: Share storage data structures between early stages	2017-05-02 20:24:09 -07:00