b9e4696533
Some Chrome OS ECs require a small amount of time after a SPI transaction to reset their controllers before they can service the next CS assertion. The kernel and depthcharge have always enforced a 200us minimum delay for this... coreboot should've done the same. BRANCH=gru BUG=chrome-os-partner:58046 TEST=Booted Kevin in recovery mode, confirmed that recovery events got logged with correct timestamps in eventlog. Change-Id: I6a7baf7859d5d50e299495d118e7890dcaa2c1b0 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/392206 Tested-by: Shawn N <shawnn@chromium.org> Reviewed-by: Shawn N <shawnn@chromium.org> |
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| acpi | ||
| compal/ene932 | ||
| google/chromeec | ||
| kontron/it8516e | ||
| lenovo | ||
| purism/librem | ||
| quanta | ||
| smsc/mec1308 | ||
| ec.h | ||