From ca374d34ed9246baf4fef97214bedd4c16c105a5 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Fri, 30 Oct 2015 11:29:14 +0100 Subject: [PATCH 1/2] sandybridge: Disable parallel CPU initialization Disable the parallel CPU initialization for model_206ax, that is Sandy Bridge and Ivy Bridge processors. We never did it the way that Intel recommends and it became unreliable with the introduction of SMM_MODULES in commit a3e41c0 Migrate 206ax to SMM_MODULES. Tested by booting kontron/ktqm77 2.6k times into Linux user space. No issues so far. Change-Id: Idffc352341419f22a36bf772534a5e11e711edf1 Signed-off-by: Nico Huber Reviewed-on: http://review.coreboot.org/12329 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/cpu/intel/model_206ax/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 490849bee7..8f062e53fa 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -17,7 +17,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_LAPIC select SMM_TSEG select SUPPORT_CPU_UCODE_IN_CBFS - select PARALLEL_CPU_INIT #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER From ad342a4589df6c51c96c1e9110979964b244fec3 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Wed, 21 Oct 2015 18:05:01 +0200 Subject: [PATCH 2/2] nb/intel/sandybridge: Fix PEG disablement Fix regression introduced by: 3660c0fc658e4e20ef079f762dfc7ad05c83544c "northbridge/intel/sandybridge: Enable PEG clock-gating on demand" Issue observed: GNU/Linux kernel crashes in earlyinit on systems without PEG devices. The crash occurs on every boot in different functions. There's no problem on systems with PEG enabled. Test system: * Lenovo T530 * Intel Core i5-3320M CPU * Fedora GNU/Linux 4.1 * PEG disabled in devicetree Problem description: Tests shows that modifing PEG chicken bit or device enable bits after setting BIOS_RESET_CPL causes random crashes in GNU/Linux. Problem solution: Disable PEG devices before setting BIOS_RESET_CPL. Final testing results: No more random kernel crashes. Change-Id: I4a967c2d00d7d1e4426cf5abdd5f616c21557da7 Signed-off-by: Patrick Rudolph Reviewed-on: http://review.coreboot.org/12112 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber (cherry picked from commit aad34cda4bc9c14ed10b00fe5da3f32233257913) Reviewed-on: https://review.coreboot.org/12456 Reviewed-by: Stefan Reinauer --- src/northbridge/intel/sandybridge/northbridge.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 76f03f3ba9..ff6849e1cf 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -431,6 +431,11 @@ static void northbridge_init(struct device *dev) } MCHBAR32(0x5f10) = bridge_type; + /* Turn off unused devices. Has to be done before + * setting BIOS_RESET_CPL. + */ + disable_peg(); + /* * Set bit 0 of BIOS_RESET_CPL to indicate to the CPU * that BIOS has initialized memory and power management @@ -456,9 +461,6 @@ static void northbridge_init(struct device *dev) /* Set here before graphics PM init */ MCHBAR32(0x5500) = 0x00100001; - - /* Turn off unused devices */ - disable_peg(); } static void northbridge_enable(device_t dev)