diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig
index 490849bee7..8f062e53fa 100644
--- a/src/cpu/intel/model_206ax/Kconfig
+++ b/src/cpu/intel/model_206ax/Kconfig
@@ -17,7 +17,6 @@ config CPU_SPECIFIC_OPTIONS
 	select UDELAY_LAPIC
 	select SMM_TSEG
 	select SUPPORT_CPU_UCODE_IN_CBFS
-	select PARALLEL_CPU_INIT
 	#select AP_IN_SIPI_WAIT
 	select TSC_SYNC_MFENCE
 	select LAPIC_MONOTONIC_TIMER
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 76f03f3ba9..ff6849e1cf 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -431,6 +431,11 @@ static void northbridge_init(struct device *dev)
 	}
 	MCHBAR32(0x5f10) = bridge_type;
 
+	/* Turn off unused devices. Has to be done before
+	 * setting BIOS_RESET_CPL.
+	 */
+	disable_peg();
+
 	/*
 	 * Set bit 0 of BIOS_RESET_CPL to indicate to the CPU
 	 * that BIOS has initialized memory and power management
@@ -456,9 +461,6 @@ static void northbridge_init(struct device *dev)
 
 	/* Set here before graphics PM init */
 	MCHBAR32(0x5500) = 0x00100001;
-
-	/* Turn off unused devices */
-	disable_peg();
 }
 
 static void northbridge_enable(device_t dev)