The variable defaults to off because this will very much be the common case.
It's set to y in the nyan config at the moment, though, since the pixel
versions are the most common for now.
BUG=None
TEST=With this and other changes built and booted on old and new nyan boards.
BRANCH=None
Change-Id: Ib42c71e693663ccbea62fbabbc1500a1c7ecef24
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/176904
Reviewed-by: Julius Werner <jwerner@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
This configuration change enables the running of reference code for
bayleybay.
BUG=chrome-os-partner:22580
BRANCH=None
TEST=manual
. built and noted output of reference code debug information. The
eMMC device driver (not yet in the code base) is working reliably
after several reboots and power cycles, indicating that the PLL
initialization code is kicking in.
Change-Id: I426baa46a72a567f54a00dc00321ee4227531eff
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175077
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
We are currently running out of MTRRs with this CPU when
marking the graphics memory as write-combining. The reason
is that the graphics stolen memory was bumped to 64MiB which
changes the address space enough that the MTRRs are exhausted.
BUG=None
BRANCH=None
TEST=Built and analyzed MTRR usage. Also noted clearing upper
2GiB of memory in depthcharge does not take forever.
Change-Id: I2eb0168990a5c585605f958e1cbc9ec1a2322d1d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174653
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
This uses VBIOS release 1004 and the binary lives in the
private overlay.
BUG=chrome-os-partner:23507
BRANCH=rambi
TEST=build and boot to dev screen via HDMI on rambi
Change-Id: I88273b54d77f001a028b87fa66591963d6d83dac
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174923
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
These configs were previously living in the private
repo. There's no reason to live in there. Therefore,
bring in those configs to simplify config changes in
a single CL. Lastly, select CONFIG_VBOOT_VERIFY_FIRMWARE=y
for both bayleybay and rambi.
If wanting to bypass talking to a TPM build with
MOCK_TPM=1.
BUG=chrome-os-partner:23249
BRANCH=None
TEST=Built and booted on bayley bay.
CQ-DEPEND=CL:*146399
CQ-DEPEND=CL:*146436
Change-Id: Ic8bac07ec05541edf0c7b3f8f140cd7daae99a68
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172713
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Now that CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM is
an option the haswell boards need to be kept in line
to maintain their previous behavior. This commit
is separated from the actual implementation for
easier rebasing.
BUG=None
BRANCH=None
TEST=Built for falco.
CQ-DEPEND=CL:172602
Change-Id: Ic8b1c7f37ab4ac7b7d453e924c30f18a528f6eb6
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172643
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
BUG=None
TEST=With this and other changes, built for the nyan board.
BRANCH=None
Change-Id: Ida74e2a09503076ba42159fd542143c26eaf1508
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/170838
Reviewed-by: Ronald Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
The test on official ChromeOS firmware bitmaps will be very blurry if
the screen resolution is too low (current value, 0x114 = 800x600).
(Port of gerrit-int falco change: I45bf72668a1e2d90a922964a20f7d9b9fcbdd6d0)
BUG=chrome-os-partner:21773.
TEST=emerge-peppy chromeos-coreboot-peppy.
BRANCH=FalcoPeppy.
Change-Id: Id870dc6829055313a71052b6f49a4c0330defc44
Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/65313
Reviewed-by: Dave Parker <dparker@chromium.org>
BRANCH=none
TEST=boot coreboot/depthcharge on snow, see cbmem console entry in
coreboot table.
BUG=chrome-os-partner:18637
Change-Id: Ie45af74ccb18c75ed3cea9b2bc363c51be588fd9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/62190
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Commit-Queue: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
BUG=None
TEST=Along with some other changes, emerged chromeos-coreboot-peach_kirby.
BRANCH=None
Change-Id: Ic78c65486816015f7574a13affc6e54acbbea73e
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/63875
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Taken directly from parrot with only string changes
TEST=emerge-* chromeos-coreboot-* succeeds
BUG=chromium:254183
Change-Id: Ia801ee82f9c7d41a47a8cb0b095e8502d7794dc5
Reviewed-on: https://gerrit.chromium.org/gerrit/61201
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Mohammed Habibulla <moch@chromium.org>
Tested-by: Mohammed Habibulla <moch@chromium.org>
Commit-Queue: Mohammed Habibulla <moch@chromium.org>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
BUG=chrome-os-partner:19420
TEST=Built and booted on pit with another change and an external tool, and was
able to get serial output. Built for snow.
BRANCH=None
Change-Id: I116d7b4277e0a57a3ae7e46432ee3e5f286e1e88
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/58607
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
This enables the logging of device path into CMOS
to assist in debug of boot and resume hangs.
BUG=chrome-os-partner:19980
BRANCH=none
TEST=manual: interrupted boot with reset button and
gathered the eventlog. Mosys has been extended to
decode the well-known POST codes:
26 | 2013-06-10 10:32:48 | System boot | 120
27 | 2013-06-10 10:32:48 | Last post code in previous boot | 0x75 | Device Initialize
28 | 2013-06-10 10:32:48 | Extra info from previous boot | PCI | 00:16.0
29 | 2013-06-10 10:32:48 | Reset Button
30 | 2013-06-10 10:32:48 | System Reset
Change-Id: Ibe78499ddfeac522a73c7324da8ab6e4f2d1945b
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58107
Taken directly from slippy with only constant + string changes.
(Peppy port of I4172460d3b075bfd5bb22013a6225cf0e8f95b9c by dlaurie)
The following changes are required in a subsequent commit:
- Add Elpida SPD data.
- Update GPIO map.
- Remove iSSD power sequencing.
- Update USB port map.
BUG=chrome-os-partner:19636
BRANCH=none
TEST=manual: emerge-peppy chromeos-coreboot-peppy
CQ-DEPEND=I3da8679d5ac9752eca75264589f66451eadad94c
Change-Id: I01dfb841f0e9186cf8a0a23f72e7be986a83be42
Reviewed-on: https://gerrit.chromium.org/gerrit/56513
Tested-by: Shawn Nematbakhsh <shawnn@chromium.org>
Reviewed-by: Dave Parker <dparker@chromium.org>
Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org>
- Only the first two DIMM SPDs are specified so far
- GPIO map is updated
- iSSD power sequencing removed
- USB port map updated
BUG=chrome-os-partner:19637
BRANCH=none
TEST=manual: emerge-falco chromeos-coreboot-falco
Change-Id: I4172460d3b075bfd5bb22013a6225cf0e8f95b9c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56329
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
The UART doesn't seem to be working early on boot.
BUG=chrome-os-partner:16132
TEST=Built for peach.
BRANCH=None
Change-Id: Iadc42e4bbb8d99e321751f081bbfeb1701011802
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/55568
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
BUG=chrome-os-partner:19420
TEST=With this and other changes, built for peach pit.
BRANCH=None
Change-Id: Id262028b03dca49e5e7c347f2a79b01bfe777fa2
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/51463
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
BUG=chrome-os-partner:18734
TEST=Built and booted into depthcharge on Snow.
BRANCH=None
Change-Id: Ib53d634ecc14b975652173fcd1f5690d6d74849d
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/49164
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
by only specifying the options that we are actually changing.
This will make it easier to spot missing per-board options.
BUG=chrome-os-partner:18638
TEST=compare old config and new config and make sure they are the same
(enflate new config with true | make oldconfig)
Change-Id: I0d00d1024340658b2b526166e6649fcf21f1ddbf
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/48045
Reviewed-by: Gabe Black <gabeblack@chromium.org>
